Ilia Lebedev, Computer Security at MIT

PhD Candidate, MIT CSAIL
Computer Science: Systems Security
32 Vassar St. Office 32-G890 Cambridge, MA 02139


I seek a career opportunity pushing the state-of-the-art in computer science, systems, and security, while also advancing public good. I have a passion for open education, especially in computer science and security, and attempt to frame my work in the context of social equity.


  • PhD Candidate, Massachusetts Institute of Technology, CSAIL Computer Science (Computer Systems, Computer Security)
    Advisor: prof. Srinivas Devadas
  • Master of Science, Massachusetts Institute of Technology, Conferred Summer 2013 Computer Science (Compilers, Computer Architecture, Computer Security)
    Advisor: prof. Srinivas Devadas
  • BS with honors, University of California at Berkeley, Conferred Spring 2010 Electrical Engineering and Computer Science (Reconfigurable Computing)
    Advisor: prof. John Wawrzynek

Notable Skills

  • Software: Python, Ruby, Golang, C/C++, Java, HTML/CSS/JS, R
  • Systems: Web, Compiler architecture, Computer architecture, GPU/FPGA computing, Deployment
  • Areas of Expertise: Security, High performance computation, High availability systems
  • Misc.: Sailing vessel captain, Bartender, Graphic artist, Proficient in Mathematics, Statistics

Notable Projects

  • Secure computation with minimal hardware support May 2014 – Present
    Advisor: prof. Srinivas Devadas – MIT
    Investigating trusted computing with commodity systems via strong isolation containers requiring no significant trusted software. The vision for this project is to enable trusted, verified applications in an untrusted environment, preventing information leakage via a malicious OS or Hypervisor by way of memory access patterns and shared resources (C/C++, RISC V, RTL).
  • EM2 – Execution Migration Machine Compiler and Library Jan. 2011 – May 2014
    Advisor: prof. Srinivas Devadas – MIT
    My MS thesis work, an optimizing compiler for MIT's EM2 architecture - a 110-core coherent shared memory system without the use of directories via deadlock-free migration of execution contexts. I also built optimized synchronization primitives for EM2 and investigated compressed instruction encoding schemes to improve utility of each migration (C/C++, LLVM, Python).
  • MARC – A Manycore Approach to Reconfigurable Computing Sep. 2009 – May 2011
    Advisor: John Wawrzynek – UC Berkeley
    My BS capstone project, a design methodology for rapid prototyping of application-specific computers via a multicore architectural template and a custom high-level C-to-gates optimizing compiler. (C++, OpenCL, Verilog).
  • RAMP – Research Accelerator for Multiple Processors Jan. 2008 – Sep. 2009
    Advisors: John Wawrzynek, Greg Giebling – UC Berkeley
    I took part in a large multi-university collaboration to build a software and hardware framework for fast cycle-accurate simulation of multiple processor systems to aid research in the area of modern computer architecture. (Java, Verilog).

Professional Experience

  • SW Engineering Intern, Arista Networks,San Francisco, CA 2014
    Scalability and availability of a large-scale distributed system.
  • Researcher, University of California at Berkeley, CA 2010
    Rapid prototyping of data-parallel applications with hardware acceleration.
  • Electronics Support Group Staff, University of California at Berkeley, CA 2008
    Low-level software and platform evaluation for education in computer systems.
  • Intern, Access Softek, Inc. Berkeley, CA 2005–2007
    Designed, developed and supported a small commercial B2B product for online banks.

Teaching Experience

  • Recipient of the 2016 MIT Hazen Award for outstanding teaching
  • TA, MIT 6.009/6.S04: Fundamentals of Programming - funprog (Fall 2015, Spring 2016)
    I am involved with the design, implementation, and teaching of a pilot course to replace MIT’s intro to computer science curriculum. The course is scalable by design, and is an experiment in methods for accessible education in computer science at a university level. The course aims to develop students’ capacity for problem solving and independent work, preparing them for advanced coursework and internships. Prof. of record: Srini Devadas, Adam Chlipala
  • TA, MIT 6.006: Intro to Algorithms (Spring 2014)
    I ran a Python-based class a class of 300 students focused on introductory and intermediate applied algorithms and programming. I held 4 lectures per week (to complement the main lecture taught by MIT faculty), designed theoretical and applied assignments, designed exam problems, administered the course. Prof. of record: Srini Devadas, Vinod Vaikuntanathan, Nancy Lynch.
  • Grader, MIT 6.857: Computer and Network Security (Spring 2012)
    I graded weekly open-ended design problems in areas of cryptosystems and systems security. Prof of record: Ron Rivest.
  • Head TA, Berkeley CS150: Computer Systems Design (2008-2010)
    I helped teach a C and Verilog-based senior design class of 40-80 students demystifying the operation of computer systems from compiler output to RTL-level implementation. Students implemented a complete computer system on an FPGA platform from scratch, and targeted it with low-level software. I helped modernize the course, designed the semester-long course projects, On a weekly basis, I taught one lab lecture, two recitations, two three-hour laboratory sections.

Recent Courses

  • MIT 6.824 - Distributed computer systems. Investigated PKI at internet scale for e-mail
  • MIT 6.858 - Computer systems security. Prototyped dynamic permissions for Android
  • MIT 6.831 - User Interaction Design. Formal user testing for a variety of interfaces
  • MIT 2.961 - Management in Engineering. Designed a complete business plan for a tech company
  • MIT 6.840, 6.850, 6.869 - Designed and taught a variety of algorithms for specific applications

Selected Publications

  • V. Costan, I. Lebedev, S. Devadas. “Sanctum: Minimal Hardware Extensions for Strong Software Isolation.” USENIX Security, 2016
  • K. Shim, M., M. Cho, I. Lebedev, S. Devadas. “Design tradeoffs for simplicity and efficient verification in the Execution Migration Machine.” Computer Design (ICCD), 2013
  • I. Lebedev, C. Fletcher, S. Cheng, J. Martin, A. Doupnik, D. Burke, M. Lin, J. Wawrzynek. “Exploring Many-core Design Templates for FPGAs and ASICs.” International Journal of Reconfigurable Computing (IJRC), 2011. (Invited Paper).
  • M. Lis, K. Shim, M. Cho, C. Fletcher, M. Kinsy, I. Lebedev, O. Khan, S. Devadas. “Brief announcement: distributed shared memory based on computation migration.” SPAA’2011.
  • C.Fletcher, I. Lebedev, N. Asadi, D. Burke, J. Wawrzynek. “Bridging the GPGPU-FPGA efficiency gap.” FPGA'2011.
  • I. Lebedev, S. Cheng, A. Doupnik, J. Martin, C. Fletcher, D. Burke, M. Lin, J. Wawrzynek. “MARC: A Many-Core Approach to Reconfigurable Computing.” RECONFIG'2010.
  • M. Lin, I. Lebedev, J. Wawrzynek. “High-throughput Bayesian computing machine with reconfigurable hardware.” FPGA’2010.